1. Technical Field
The present invention relates generally to resistive change memory elements, and, more specifically, to a method of resetting resistive change memory elements wherein the memory elements are prevented from entering an unrecoverable high resistive state.
2. Discussion of Related Art
Any discussion of the related art throughout this specification should in no way be considered as an admission that such art is widely known or forms part of the common general knowledge in the field.
Resistive change memory devices and arrays, often referred to as resistance RAMs by those skilled in the art, are well known in the semiconductor industry. Such devices and arrays include, but are not limited to, phase change memory, solid electrolyte memory, metal oxide resistance memory, and carbon nanotube memory such as NRAM™.
Resistive change memory devices and arrays store information by adjusting a resistive change memory element, typically comprising some material that can be adjusted between a number of non-volatile resistive states in response to some applied stimuli, within each individual memory cell between two or more resistive states. For example, each resistive state within a resistive change memory cell can correspond to a data value which can be programmed and read back by supporting circuitry within the device or array.
For example, a resistive memory change element might be arranged to switch between two resistive states: a high resistive state (which might correspond to a logic “0”) and a low resistive state (which might correspond to a logic “1”). In this way, a resistive change memory element can be used to store one binary digit (bit) of data.
Within the current state of the art, there is an increasing need to reliably and rapidly control the switching of resistive change memory elements as they are adjusted from one resistive state to another. Specifically, there is a need to control the adjustment of a resistive change memory element from a low resistive state to a high resistive state, typically referred to as a “reset” operation by those skilled in the art, such that the resistive change memory element does not enter a very low resistive state, essentially an undesired set state inadvertently triggered during the reset operation, which, in certain applications, may represent an unrecoverable condition.
To this end, it would be advantageous if a programming method would perform a reset operation (a transition from a low resistive state to a high resistive state) on a resistive change memory element while guarding against driving the resistive change memory element into a very low and potentially unrecoverable state.